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涓誨鐞嗗櫒鐨勯夊瀷鍜孉RM澶勭悊鍣ㄧ殑鍔熻兘鐗規(guī)э紝鍙互鐪嬪埌ARM澶勭悊鍣ㄥ叿鏈夊己澶х殑浜嬪姟澶勭悊鑳藉姏錛屼絾鏄疉RM澶勭悊鍣ㄤ篃鏈変笉瓚充箣澶勶紝渚嬪錛屾暟鎹鐞嗛熷害鏈夐檺錛屽畾鏃朵笉鍑嗙‘錛屽疄鐜版椂搴忓洶闅懼拰浜嬩歡澶勭悊涓嶅強(qiáng)鏃剁瓑錛岃繖灝遍渶瑕侀氳繃閫夋嫨鍚堥傜殑杈呭姪澶勭悊鍣ㄦ潵寮ヨˉ銆?
鍙紪紼嬮昏緫鍣ㄤ歡(Programmable Logic Device)鍏鋒湁鏁版嵁澶勭悊閫熷害蹇乀O璧勬簮涓板瘜銆佸畾鏃剁簿紜佸疄鐜版椂搴忕畝鍗曠瓑浼樼偣錛屽垰濂藉彲浠ュ譏琛ヤ簡ARM澶勭悊鍣ㄧ殑涓嶈凍涔嬪銆傚洜姝わ紝杈呭姪澶勭悊鍣ㄧ殑閫夊瀷闂灝卞彉涓哄彲緙栫▼閫昏緫鍣ㄤ歡鐨勯夊瀷銆傜洰鍓嶏紝甯哥敤鐨勫彲緙栫▼閫昏緫鍣ㄤ歡鏈夊鏉傚彲緙栫▼閫昏緫鍣ㄤ歡CPLD( Complex Programmable Logic Device )鍜岀幇鍦哄彲緙栫▼闂ㄩ樀鍒桭PGA(Field Programmable Gate Array)銆傜敱浜嶤PLD鍜孎PGA緇撴瀯涓婄殑涓嶅悓錛屼嬌寰楀畠浠櫎浜嗗叿鏈夊叡鍚岀偣錛岃繕瀛樺湪鍚勮嚜鐨勭壒鐐?
(1) FPGA鐨勯泦鎴愬害楂樹簬CPLD;
(2)FPGA鏇撮傚悎浜庢椂搴忛昏緫鐨勮璁★紝鍗沖寘鍚瑙﹀彂鍣ㄧ殑璁捐錛岃孋PLD鏇撮傚悎浜庣畻娉曞拰緇勫悎閫昏緫鐨勮璁★紝鍗寵Е鍙戝櫒鏈夐檺鑰屼箻縐」澶氱殑璁捐;
(3)鍦ㄧ紪紼嬩笂錛孎PGA鍏鋒湁鏇村ぇ鐨勭伒媧繪с傚洜涓篊PLD瑕侀氳繃淇敼鍏鋒湁鍥哄畾鍐呰繛鐢?shù)璧\鐨勯昏緫鍔熻兘鏉ュ疄鐜扮紪紼嬶紝鑰孎PGA涓昏閫氳繃鏀瑰彉鍐呴儴鐨勫竷綰挎潵瀹炵幇緙栫▼;
(4) CPLD 鐨勯熷害瑕佹瘮FPGA 蹇紝鑰屼笖CPLD鍏鋒湁鏃墮棿鍙嫻嬫ц孎GPA娌℃湁;
(5)涓鑸紝FPGA 姣?CPLD鐨勫姛鑰楄浣庯紝鑰屼笖闅忕潃闆嗘垚搴︽彁楂樿屾洿鍔犳槑鏄?
(6) CPLD閲囩敤EPROM鎴朏LASH 宸ヨ壓錛岀郴緇熸帀鐢?shù)鍚庡Q屼俊鎭笉涓㈠け:鑰孎PGA鐨勭紪紼嬪崟鍏冩槸鍩轟簬SRAM緇撴瀯褰㈡垚鐨勶紝緋葷粺鎺夌數(shù)鍚庯紝淇℃伅涓㈠け錛岄渶瑕佸鍔犲瓨鍌ㄥ櫒鑺墖銆?
閫氳繃鍒嗘瀽浠ヤ笂鍑犵偣 CPLD涓嶧PGA 鐨勫樊寮傛у拰渚濇嵁鎺у埗鍣ㄧ殑鍔熻兘闇瑕侊紝鏈璁捐涓夌敤鐜板満鍙紪紼嬮棬闃靛垪FPGA浣滀負(fù)杈呭姪澶勭悊鍣ㄨ姱鐗囥侳PGA鍥犲叾鍏鋒湁浣撶Н灝忋侀泦鎴愬害楂樸佺伒媧繪ч珮絳変紭鐐硅岃騫挎硾搴旂敤浜庡鏉傛暟瀛楃郴緇熶腑銆傚叿浣撲嬌鐢ㄥ摢縐嶅瀷鍙風(fēng)殑FPGA鑺墖瀵圭郴緇熺殑鎬ц兘涔熸槸閲嶈鐨勶紝濡傛灉FPGA閫夊瀷涓嶅悎閫傦紝鍦ㄥ悗緇殑璁捐涓細(xì)鍑虹幇寰堝闂錛屼嬌璁?
璁″鏉傚寲錛岀敋鑷沖け璐?鑰屾伆褰撶殑閫夊瀷涓嶄絾鍙互閬垮厤璁捐涓殑-浜涘鏉傞棶棰橈紝浣胯璁$畝鍗曪紝鑰屼笖榪樹細(xì)鎻愰珮緋葷粺鐨勫彲闈犳э紝寤墮暱浜у搧鐨勭敓鍛藉懆鏈燂紝浣夸駭鍝佽幏寰楅珮鎬т環(huán)姣斻傚洜姝わ紝鍦ㄩ夋嫨FPGA鍣ㄤ歡鏃墮渶瑕佽冭檻鐨勪富瑕佸洜绱犳湁浠ヤ笅鍑犵偣.